HAL GFXMMU constants migration ¶

This section provides information about the HAL GFXMMU constants migration.

HAL GFXMMU block count identifiers constants ¶

HAL1	HAL2
#define GFXMMU_192BLOCKS #define GFXMMU_256BLOCKS	typedef enum { HAL_GFXMMU_BLOCK_PER_LINE_192, HAL_GFXMMU_BLOCK_PER_LINE_256, } hal_gfxmmu_block_per_line_t;

Related concepts:

Replace Finite Parameter Defines (Including PPP Instances) with Enum Types at HAL Levels.
Add HAL_PPP Prefix to All HAL Peripheral APIs (Defines, Macros, Types, and Functions).

HAL GFXMMU cache lock enable/disable constants ¶

HAL1	HAL2
#define GFXMMU_CACHE_LOCK_DISABLE #define GFXMMU_CACHE_LOCK_ENABLE	typedef enum { HAL_GFXMMU_CACHE_LOCK_DISABLED, HAL_GFXMMU_CACHE_LOCK_ENABLED, } hal_gfxmmu_cache_lock_status_t;

HAL GFXMMU cache lock buffer/address cache lock buffer indices constants ¶

HAL1	HAL2
In `HAL1`, the cache lock buffer is a member of the `GFXMMU_CachePrefetchTypeDef` structure. #define GFXMMU_CACHE_LOCK_BUFFER0 #define GFXMMU_CACHE_LOCK_BUFFER1 #define GFXMMU_CACHE_LOCK_BUFFER2 #define GFXMMU_CACHE_LOCK_BUFFER3 In `HAL1`, the address cache lock buffer is a member of the `GFXMMU_AddressCacheTypeDef` structure. #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER0 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER1 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER2 #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER3	These constants have been removed in `HAL2`. The cache lock buffer and address cache lock buffer are now managed through dedicated functions within the HAL layer. HAL_GFXMMU_EnableCacheLockBuff() HAL_GFXMMU_DisableCacheLockBuff() `hal_gfxmmu_buff_t` is to choose the buffer index. For more details, refer to HAL GFXMMU cache and prefetch type definition and HAL GFXMMU address cache type definition.

HAL1

HAL2

In HAL1, the cache lock buffer is a member of the GFXMMU_CachePrefetchTypeDef structure.

                #define GFXMMU_CACHE_LOCK_BUFFER0
#define GFXMMU_CACHE_LOCK_BUFFER1
#define GFXMMU_CACHE_LOCK_BUFFER2
#define GFXMMU_CACHE_LOCK_BUFFER3

               

In HAL1, the address cache lock buffer is a member of the GFXMMU_AddressCacheTypeDef structure.

                #define GFXMMU_ADDRESSCACHE_LOCK_BUFFER0
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER1
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER2
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER3

               

These constants have been removed in HAL2. The cache lock buffer and address cache lock buffer are now managed through dedicated functions within the HAL layer.

                HAL_GFXMMU_EnableCacheLockBuff()
HAL_GFXMMU_DisableCacheLockBuff()

hal_gfxmmu_buff_t is to choose the buffer index.

For more details, refer to HAL GFXMMU cache and prefetch type definition and HAL GFXMMU address cache type definition.

HAL GFXMMU buffer overflow and AHB master interrupt identifiers constants ¶

HAL1	HAL2
#define GFXMMU_BUFFER0_OVERFLOW_IT #define GFXMMU_BUFFER1_OVERFLOW_IT #define GFXMMU_BUFFER2_OVERFLOW_IT #define GFXMMU_BUFFER3_OVERFLOW_IT #define GFXMMU_AHB_MASTER_ERROR_IT	#define HAL_GFXMMU_IT_BUFF0_OVERFLOW #define HAL_GFXMMU_IT_BUFF1_OVERFLOW #define HAL_GFXMMU_IT_BUFF2_OVERFLOW #define HAL_GFXMMU_IT_BUFF3_OVERFLOW #define HAL_GFXMMU_IT_AHB_MASTER_ERROR

HAL1

HAL2

                #define GFXMMU_BUFFER0_OVERFLOW_IT
#define GFXMMU_BUFFER1_OVERFLOW_IT
#define GFXMMU_BUFFER2_OVERFLOW_IT
#define GFXMMU_BUFFER3_OVERFLOW_IT
#define GFXMMU_AHB_MASTER_ERROR_IT

               

                #define HAL_GFXMMU_IT_BUFF0_OVERFLOW
#define HAL_GFXMMU_IT_BUFF1_OVERFLOW
#define HAL_GFXMMU_IT_BUFF2_OVERFLOW
#define HAL_GFXMMU_IT_BUFF3_OVERFLOW
#define HAL_GFXMMU_IT_AHB_MASTER_ERROR

               

HAL GFXMMU cache force operations constants ¶

HAL1	HAL2
In `HAL1`, the cache force is a member of the `GFXMMU_CachePrefetchTypeDef` structure. #define GFXMMU_CACHE_FORCE_DISABLE #define GFXMMU_CACHE_FORCE_ENABLE	These constants have been removed from `HAL2`, the cache force is now managed by unitary functions in the HAL layer. HAL_GFXMMU_DisableForceCache() HAL_GFXMMU_EnableForceCache()
#define GFXMMU_CACHE_FORCE_FLUSH #define GFXMMU_CACHE_FORCE_INVALIDATE	These constants have been removed in `HAL2`; cache flush and invalidate operations are now managed through dedicated functions within the HAL layer. HAL_GFXMMU_CleanCache() HAL_GFXMMU_InvalidateCache() HAL_GFXMMU_CleanInvalidateCache()

HAL GFXMMU buffer overflow error flags constants ¶

HAL1	HAL2
#define GFXMMU_ERROR_NONE #define GFXMMU_ERROR_BUFFER0_OVERFLOW #define GFXMMU_ERROR_BUFFER1_OVERFLOW #define GFXMMU_ERROR_BUFFER2_OVERFLOW #define GFXMMU_ERROR_BUFFER3_OVERFLOW #define GFXMMU_ERROR_AHB_MASTER #define GFXMMU_ERROR_INVALID_CALLBACK	#define HAL_GFXMMU_ERROR_NONE #define HAL_GFXMMU_ERROR_BUFF0_OVERFLOW #define HAL_GFXMMU_ERROR_BUFF1_OVERFLOW #define HAL_GFXMMU_ERROR_BUFF2_OVERFLOW #define HAL_GFXMMU_ERROR_BUFF3_OVERFLOW #define HAL_GFXMMU_ERROR_AHB_MASTER Removed; This kind of logical error is reported by direct function return.

HAL1

HAL2

                #define GFXMMU_ERROR_NONE
#define GFXMMU_ERROR_BUFFER0_OVERFLOW
#define GFXMMU_ERROR_BUFFER1_OVERFLOW
#define GFXMMU_ERROR_BUFFER2_OVERFLOW
#define GFXMMU_ERROR_BUFFER3_OVERFLOW
#define GFXMMU_ERROR_AHB_MASTER

               

#define GFXMMU_ERROR_INVALID_CALLBACK

                #define HAL_GFXMMU_ERROR_NONE
#define HAL_GFXMMU_ERROR_BUFF0_OVERFLOW
#define HAL_GFXMMU_ERROR_BUFF1_OVERFLOW
#define HAL_GFXMMU_ERROR_BUFF2_OVERFLOW
#define HAL_GFXMMU_ERROR_BUFF3_OVERFLOW
#define HAL_GFXMMU_ERROR_AHB_MASTER

               

Removed; This kind of logical error is reported by direct function return.

HAL GFXMMU lut line enable/disable constants ¶

HAL1	HAL2
In `HAL1`, the lut line status is member of the `GFXMMU_LutLineTypeDef` structure. #define GFXMMU_LUT_LINE_DISABLE #define GFXMMU_LUT_LINE_ENABLE	These constants have been removed from `HAL2`, and the LUT line status is no longer available. Instead, the equivalent functionality is automatically enabled by configuring the LUT lines structure `hal_gfxmmu_lut_t`. To manage the LUT configuration, use the `HAL_GFXMMU_SetLUT()` function to enable and set the LUT, and the `HAL_GFXMMU_ResetLutLines()` function to disable the LUT configuration.

HAL GFXMMU outer bufferability enable/disable constants ¶

HAL1	HAL2
#define GFXMMU_OUTTER_BUFFERABILITY_DISABLE #define GFXMMU_OUTTER_BUFFERABILITY_ENABLE	typedef enum { HAL_GFXMMU_OUTER_BUFFERABILITY_DISABLE, HAL_GFXMMU_OUTER_BUFFERABILITY_ENABLE, } hal_gfxmmu_outer_bufferability_t;

HAL1

HAL2

                #define GFXMMU_OUTTER_BUFFERABILITY_DISABLE
#define GFXMMU_OUTTER_BUFFERABILITY_ENABLE

                typedef enum
{
  HAL_GFXMMU_OUTER_BUFFERABILITY_DISABLE,
  HAL_GFXMMU_OUTER_BUFFERABILITY_ENABLE,
 } hal_gfxmmu_outer_bufferability_t;

               

Related concepts:

HAL GFXMMU outer cachability enable/disable constants ¶

HAL1	HAL2
#define GFXMMU_OUTTER_CACHABILITY_DISABLE #define GFXMMU_OUTTER_CACHABILITY_ENABLE	typedef enum { HAL_GFXMMU_OUTER_CACHABILITY_DISABLE, HAL_GFXMMU_OUTER_CACHABILITY_ENABLE, } hal_gfxmmu_outer_cachability_t;

HAL1

HAL2

                #define GFXMMU_OUTTER_CACHABILITY_DISABLE
#define GFXMMU_OUTTER_CACHABILITY_ENABLE

                typedef enum
{
  HAL_GFXMMU_OUTER_CACHABILITY_DISABLE,
  HAL_GFXMMU_OUTER_CACHABILITY_ENABLE,
} hal_gfxmmu_outer_cachability_t;

               

Related concepts:

HAL GFXMMU prefetch enable/disable constants ¶

HAL1	HAL2
#define GFXMMU_PREFETCH_DISABLE #define GFXMMU_PREFETCH_ENABLE	These constants have been removed from `HAL2`. Prefetch functionality is now controlled directly through dedicated functions within the HAL layer. hal_status_t HAL_GFXMMU_DisablePrefetch() hal_status_t HAL_GFXMMU_EnablePrefetch()